2021
- Jiwoon Park, and Hoyoung Yoo, “Area-Efficient On-the-Fly Code Generator for BDS B1C Receivers,” International Conference on Electronics, Information, and Communication (ICEIC 2021), Jeju, 2021, pp.839-842.
- Sungryoung Lee, and Hoyoung Yoo, “Configurable Digital Pulse Generator for Neuromorphic Devices,” International Conference on Electronics, Information, and Communication (ICEIC 2021), Jeju, 2021, pp.391-393.
- Soyoen Choi, Yerin Shin, and Hoyoung Yoo, “Analysis of Ring-Oscillator-based True Random Number Generator on FPGAs,” International Conference on Electronics, Information, and Communication (ICEIC 2021), Jeju, 2021, pp.372-374.
2020
- Hyeonkyu Kim, Soyoen Choi, Yeonshin Joo, Woocheol Shin, and Hoyoung Yoo, “Low-cost Hierarchical Monitoring System for Solar Photovoltaic Systems,” The Fifth International Conference On Consumer Electronics (ICCE-Asia 2020), Busan, 2020.
- Soyoen Choi, Jieun Yeo, and Hoyoung Yoo, “Extraction of ROM Data from Bitsteram in Xilinx FPGA,” The 17th International SoC Conference (ISOCC 2020), Yeosu, 2020, pp. 97-98.
- Soyoen Choi, Jiwoon Park, and Hoyoung Yoo, “Area-Efficient Fault Tolerant Design for Finite State Machines,” IEEE International conference on Electronics, Informations, and Communication (ICEIC 2020), Barcelona, 2020, pp. 170-171.
2019
- Hyeonkyu Kim, Soyoen Choi, and Hoyoung Yoo, “On-demand Syndrome Calculation for BCH decoding,” IEEE International conference on Electronics, Informations, and Communication (ICEIC 2019), Auckland, 2019.
2018
- Soyeon Choi and Hoyoung Yoo, “Hybrid Decoding for polar codes”, International SOC Design Conference (ISOCC 2018), Daegu, Korea, Nov. 2018, pp. 121-122.
- Dohyun Ryu, Hyeonkyu Kim, and Hoyoung Yoo, “Syndrome-aided Pruning Architecture for Successive-Cancellation Decoding of Polar Codes,” IEEE International conference on Electronics, Informations, and Communication (ICEIC 2018), Honolulu, HI, 2018, pp. 784-785.
2014
- Hoyoung Yoo, Youngjoo Lee, and In-Cheol Park, “7.3 Gb/s Universal BCH Encoder and Decoder for SSD Controllers,”19th Asia and South Pacific Design Automation Conference (ASP-DAC 2014), Singapore, Jan. 2014, pp. 37-38.
2013
- Youngjoo Lee, Hoyoung Yoo, and In-Cheol Park, “A 3Gb/s 2.08mm2 100b Error-correcting BCH decoder in 0.13um CMOS process,”18th Asia and South Pacific Design Automation Conference (ASP-DAC 2013), Yokohama, Japan, Jan. 2013, pp. 85-86.
2012
- Hoyoung Yoo, Youngjoo Lee, and In-Cheol Park, “Low-Latency Area-Efficient Decoding Architecture for Shortened Reed Solomon Codes,” International SoC Design Conference (ISOCC 2012), Jeju, Korea, Nov. 2012, pp. 223-226.
- Youngjoo Lee, Hoyoung Yoo, and In-Cheol Park, “Small-Area Parallel Syndrome Calculation for Strong BCH Decoding,”IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP 2012), Kyoto, Japan, Mar. 2012, pp. 1609-1612.
- Youngjoo Lee, Hoyoung Yoo, Injae Yoo and In-Cheol Park, “6.4Gbps Multi-Threaded BCH Encoder and Decoder for Multi-Channel SSD Controllers,”IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC 2012), San Francisco, CA, USA, Feb. 2012, pp. 426-427.